Fabricating method of a strained FET
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United States of America Patent
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Jan 9, 2018
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app pub date -
Jul 30, 2015
filing date -
Jul 30, 2015
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Abstract
A fabricating method of a strained FET includes providing a semiconductive layer having a gate structure disposed thereon, wherein an epitaxial layer is embedded in the semiconductive layer aside the gate structure. Later, an element supply layer is formed to contact the epitaxial layer, wherein the element supply layer and the epitaxial layer have at least one identical element besides silicon. Finally, a thermal process is performed to drive the element into the epitaxial layer.
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