One-time-programming (OTP) memory cell with floating gate shielding
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United States of America Patent
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Jan 9, 2018
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Jan 28, 2016
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Jan 28, 2016
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Abstract
A one-time programmable (OTP) memory cell with floating gate shielding is provided. A pair of transistors is arranged on a semiconductor substrate and electrically coupled in series, where the transistors comprise a floating gate. An interconnect structure overlies the pair of transistors. A shield is arranged in the interconnect structure, directly over the floating gate. The shield is configured to block ions in the interconnect structure from moving to the floating gate. A method for manufacturing an OTP memory cell with floating gate shielding is also provided.
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