Method of making a fully depleted semiconductor-on-insulator programmable cell and structure thereof
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United States of America Patent
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Jan 9, 2018
Grant Date -
Dec 28, 2017
app pub date -
Jul 12, 2016
filing date -
Jun 27, 2016
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Abstract
A programmable cell includes a semiconductor-on-insulator substrate, a program gate, and a word line gate. The semiconductor-on-insulator substrate includes a semiconductor layer. The semiconductor layer includes a first doped source/drain region, a second doped source/drain region and a region comprising germanium. The program gate is disposed above the region comprising germanium and includes a first gate dielectric layer disposed below a gate conductor. The word line gate is disposed between the first doped source/drain region and the second doped source/drain region.
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