Semiconductor device and method of manufacturing semiconductor device
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United States of America Patent
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Jan 9, 2018
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Sep 27, 2016
filing date -
Jul 29, 2011
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Abstract
A semiconductor device having a high degree of freedom of layout has a first part AR1, in which a plurality of p-type wells PW and n-type wells NW are alternately arranged to be adjacent to each other along an X-axis direction. A common power feeding region (ARP2) for the plurality of wells PW is arranged on one side so as to interpose the AR1 in a Y-axis direction, and a common power feeding region (ARN2) for the plurality of wells NW is arranged on the other side. In the power feeding region (ARP2) for the PW wells, a p+-type power-feeding diffusion layer P+(DFW) having an elongate shape extending in the X-axis direction is formed. A plurality of gate layers GT extending in the X-axis direction to cross the boundary between the PW and NW wells are arranged in the AR1, and a plurality of MIS transistors are correspondingly formed.
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