FinFET with uniform shallow trench isolation recess
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United States of America Patent
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Jan 9, 2018
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N/A
app pub date -
Mar 6, 2017
filing date -
Mar 6, 2017
priority date (Note) -
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Abstract
Disclosed herein are processes and structures for uniform STI recessing. A method of making a semiconductor device includes initially forming a dense region of at least two fins on a substrate. The fins have a hard mask layer on a surface. The dense region with the fins is adjacent to an isolated region without fins within a distance of a pitch of the fins. An oxide is deposited on the dense and isolated regions. The oxide is polished, stopping on the hard mask layer on the fins, and removing more oxide in the isolated region. Polishing results in forming a non-uniform oxide surface. The hard mask layer is removed from the fins. An etch process is performed to further recess the oxide in the dense and isolated regions, such that a thickness of the oxide in the dense region and the isolated region is substantially uniform.
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