Alignment in the packaging of integrated circuits

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United States of America Patent

PATENT NO 9865574
SERIAL NO

15143957

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Abstract

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A method includes aligning a top package to a bottom package using an alignment mark in the bottom package, and placing the top package over the bottom package, wherein the top package is aligned to the bottom package after the placing the top package over the bottom package. A reflow is then performed to bond the top package to the bottom package.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Ming-Da Jhubei, TW 447 4774
Huang, Kuei-Wei Hsin-Chu, TW 72 1278
Lin, Chih-Wei Zhubei, TW 359 5145
Lin, Wei-Hung Xinfeng Township, TW 175 1616
Liu, Chung-Shi Hsin-Chu, TW 824 11367

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