Tunable semiconductor band gap reduction by strained sidewall passivation
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United States of America Patent
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Jan 9, 2018
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app pub date -
Aug 7, 2015
filing date -
Aug 7, 2015
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Abstract
A semiconductor device includes a mesa structure having vertical sidewalls, the mesa structure including an active area comprising a portion of its height. A stressed passivation liner is formed on the vertical sidewalls of the mesa structure and over the portion of the active area. The stressed passivation liner induces strain in the active area to permit tuning of performance parameters of the mesa structure.
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