Flash memory device and erase method thereof capable of reducing power consumption
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United States of America Patent
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Jan 9, 2018
Issued Date -
N/A
app pub date -
Feb 17, 2017
filing date -
Feb 18, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Provided is a flash memory device capable of restricting power consumption in an erase operation. The invention includes a plurality of wells, a power supply device, and a coupling device. The power supply device applies erase voltages to the wells for performing an erase operation. The coupling device performs selective coupling between the wells. When performing the erase operation on the wells, the power supply device applies the erase voltage to one of the wells, and applies the erase voltage to the other one of the wells after the coupling device electrically couples the one of the wells to the other one of the wells.
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- 7 Age
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