Performing read operations on a memory device

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United States of America Patent

PATENT NO 9865357
SERIAL NO

15395700

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Abstract

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Technology for performing read operations in a memory device or system is described. The device or system can include an array of memory cells. The device or system can include a first decode circuit, and can further include a second decode circuit. The device or system can include a voltage regulator configured to perform a read operation by providing, based on one or more signals received from at least one of the first decode circuit or the second decode circuit, a voltage to a selected plane or a selected sub-plane in the array of memory cells.

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Patent Owner(s)

Patent OwnerAddress
INTEL NDTM US LLC2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kalavade, Pranav San Jose, US 102 737
Rajwade, Shantanu R Santa Clara, US 32 130
Thimmegowda, Deepak Fremont, US 33 311
Yip, Aaron Los Gatos, US 117 1301

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