Enhanced temperature compensation for resistive memory cell circuits
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United States of America Patent
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Jan 9, 2018
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Dec 1, 2016
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Oct 29, 2015
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Abstract
A computer-implemented method for performing a voltage-based measurement of a resistive memory cell having a plurality of programmable cell states includes providing, via a processor, a prebiased voltage at a connecting node. The method further includes prebiasing a bitline capacitance of the resistive memory cell. In other aspects, the method includes settling, via the processor, a sensing circuit to a target voltage. The method further includes outputting a resultant value based on a sensed voltage at the resistive memory cell.
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