Semiconductor memory with data line capacitive coupling
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 9, 2018
Issued Date -
N/A
app pub date -
Feb 16, 2017
filing date -
Jun 14, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor memory includes a first data line, a second data line, a first coupling line, a second coupling line, a first plurality of transistors, and a second plurality of transistors. The first coupling line is configured to be capacitively coupled with the first data line. The second coupling line is configured to be capacitively coupled with the second data line. The first plurality of transistors are configured to transmit a first voltage to the first coupling line and the second coupling line in response to a first control signal. The second plurality of transistors are configured to transmit a second voltage to the first coupling line, the second coupling line, or a combination thereof in response to a second control signal and a third control signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully