Method and apparatus for placement and routing of circuit designs
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 9, 2018
Issued Date -
N/A
app pub date -
Feb 10, 2016
filing date -
Feb 10, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Methods and systems are disclosed for placement and routing of a circuit design. A set of timing constraints is retrieved that specifies timing for objects included in a first shell circuit design configured to provide an interface for communication between the circuit design and the set of dedicated hardware resources on an IC. One or more objects of the first shell circuit design that do not affect timing of the circuit design are identified and removed from the first shell circuit design to produce a second shell circuit design. The circuit design is placed and routed according to timing constraints specified for objects of the first shell circuit design that are included in the second shell circuit design. The placed and routed circuit design is stored in a memory circuit.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2016 Application Filing Year
- G06F Class
- 60255 Applications Filed
- 46180 Patents Issued To-Date
- 76.65 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 3 Citation Count
- G06F Class
- 20.77 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jul 9, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jul 9, 2029 |