Hardware acceleration device handoff for using programmable integrated circuits as hardware accelerators
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United States of America Patent
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Jan 9, 2018
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app pub date -
Sep 17, 2015
filing date -
Sep 17, 2015
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Abstract
Implementing hardware accelerators using programmable integrated circuits may include performing, using a processor, a design flow on a static circuit design. The static circuit design may specify a region reserved for a hardware accelerator and a static region comprising interface circuitry configured to couple the hardware accelerator with an external node. The design flow may generate an implemented static circuit design. Metadata describing the interface circuitry may be generated using a processor. A device support archive including the implemented static circuit design and the metadata may be written, using the processor, to a computer readable storage medium.
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