Semiconductor apparatus reducing a parasitic capacitance

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United States of America Patent

PATENT NO 9859892
SERIAL NO

15047864

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Abstract

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A semiconductor apparatus may include a transmission circuit, a reception circuit, and a pad commonly coupled to the transmission circuit and the reception circuit. When either the transmission circuit or the reception circuit is activated, parasitic capacitance of a line coupled to the transmission circuit, the reception circuit, and the pad is varied.

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Patent Owner(s)

Patent OwnerAddress
SK HYNIX INCICHEON-SI GYEONGGI-DO 17336

International Classification(s)

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  • 2016 Application Filing Year
  • H03K Class
  • 2511 Applications Filed
  • 2079 Patents Issued To-Date
  • 82.80 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances201620172018201920202021202220230255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Sun Ki Icheon-si, KR 25 30

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  • 1 Citation Count
  • H03K Class
  • 21.67 % this patent is cited more than
  • 7 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges306935117261382111201 - 1011 - 2021 - 3031 - 4041 - 5051 - 6071 - 8081 - 9091 - 100100 +0501001502002503003504004505005506006507007508008509009501000

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