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Country	kind	publication No.	Filing Date	Type	Sub-Type
CN	A	CN106918725	Dec 25, 2015	Patent	Application
Type : Patent Sub-Type : Application
UNEXAMINED APPLICATION FOR A PATENT FOR INV.		Tool joint test work group signal concatenates the test circuit plate of circuit design		Jul 04, 2017

• 15 United States
• 10 France
• 8 Japan
• 7 China
• 5 Korea
• 2 Other

Patent Owner(s)

Patent Owner	Address
INVENTEC CORPORATION	NO 66 HOU-KANG STREET SHIH-LIN DIST TAIPEI CITY
INVENTEC (PUDONG) TECHNOLOGY CORPORATION	NO 789 PUXING ROAD MIN HANG DISTRICT SHANGHAI

International Classification(s)

• G06F:ELECTRIC DIGITAL DATA PROCESSING
• G01R:MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC V....

• 2016 Application Filing Year
• G06F Class
• 60255 Applications Filed
• 46180 Patents Issued To-Date
• 76.65 % Issued To-Date

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Song, Ping	Shanghai, CN	93	403
# of filed Patents : 93 Total Citations : 403

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Patent Citation Ranking

• 0 Citation Count
• G06F Class

• 0 % this patent is cited more than
• 7 Age

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Maintenance Fees

Fee	Large entity fee	small entity fee	micro entity fee	due date
7.5 Year Payment	$3600.00	$1800.00	$900.00	Jul 2, 2025
11.5 Year Payment	$7400.00	$3700.00	$1850.00	Jul 2, 2029

Fee	Large entity fee	small entity fee	micro entity fee
Surcharge - 7.5 year - Late payment within 6 months	$160.00	$80.00	$40.00
Surcharge - 11.5 year - Late payment within 6 months	$160.00	$80.00	$40.00
Surcharge after expiration - Late payment is unavoidable	$700.00	$350.00	$175.00
Surcharge after expiration - Late payment is unintentional	$1,640.00	$820.00	$410.00

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
January 02, 2018	US,9857426,B2   US9857426B2	GRANTED PATENT AS SECOND PUBLICATION
June 29, 2017	US,20170184672,A1   US20170184672A1	FIRST PUBLISHED PATENT APPLICATION

Full Text

US Patent No: 9857426

Test-used printed circuit board having in-series circuit involved with join test action group signal

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Abstract

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A test-used PCB having an in-series circuit involved with a join test action group (JTAG) signal is provided. A first JTAG connection interface and a second JTAG connection interface are configured on test circuit boards. Test circuit boards can be seriously connected with each other through the first JTAG connection interface and the second JTAG connection interface. Therefore, the efficiency of providing series test circuit boards, reducing TAP controller and JTAG port may be achieved.

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Description

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Claims

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Claims data not available

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Legal Events

 

• MAFP2025
• MAFP2021
• I2018
• STCF2017
• P2017
• F2016
• AS2016
• PD2015

Date	Code	Event	Description
Jun 26, 2025	MAFP	MAINTENANCE FEE PAYMENT	free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY year of fee payment: 8
Jun 16, 2021	MAFP	MAINTENANCE FEE PAYMENT	free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY year of fee payment: 4
Jan 02, 2018	I	Issuance
Dec 13, 2017	STCF	INFORMATION ON STATUS: PATENT GRANT	free format text: PATENTED CASE
Jun 29, 2017	P	Published
Mar 17, 2016	F	Filing
Mar 16, 2016	AS	ASSIGNMENT	free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SONG, PING;REEL/FRAME:038019/0696 Owner name: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, CHINA Effective Date: Mar 16, 2016 free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SONG, PING;REEL/FRAME:038019/0696 Owner name: INVENTEC CORPORATION, TAIWAN Effective Date: Mar 16, 2016
Dec 25, 2015	PD	Priority Date