Dynamic design partitioning for diagnosis
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United States of America Patent
Stats
-
Jan 2, 2018
Issued Date -
N/A
app pub date -
May 4, 2016
filing date -
Nov 18, 2011
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Aspects of the invention relate to techniques for fault diagnosis based on dynamic circuit design partitioning. According to various implementations of the invention, a sub-circuit is extracted from a circuit design based on failure information of one or more integrated circuit devices. The extraction process may comprise combining fan-in cones of failing observation points included in the failure information. The extraction process may further comprise adding fan-in cones of one or more passing observation points to the combined fan-in cones of the failing observation points. Clock information of test patterns and/or layout information of the circuit design may be extracted and used in the sub-circuit extraction process. The extracted sub-circuit may then be used for diagnosing the one or more integrated circuit devices.
First Claim
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International Classification(s)
- 2016 Application Filing Year
- G06F Class
- 60255 Applications Filed
- 46180 Patents Issued To-Date
- 76.65 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- G06F Class
- 0 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
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