Negative bias thermal instability stress testing of transistors
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United States of America Patent
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Jan 2, 2018
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app pub date -
Aug 15, 2014
filing date -
Aug 27, 2013
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Abstract
A circuit is powered through a P-type transistor whose thermal instability behavior is to be evaluated. The threshold of the P-type transistor under evaluation and consequently the saturation current of the transistor are reflected in the frequency of the circuit, which in one embodiment is a ring oscillator. Additional circuitry is connected to the P-type transistor and the ring oscillator to ensure the proper stress conditions for the transistor and consequently to the evaluation of the P-type transistor.
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