Biasing the substrate region of an MOS transistor

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United States of America Patent

PATENT NO 9847349
SERIAL NO

15463493

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Abstract

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An integrated electronic device is supported by a substrate of a silicon on insulator type. At least one transistor is formed in and on a semiconductor film of the substrate. The transistor includes a drain region and a source region of a first conductivity type and a substrate (body) region of a second conductivity type lying under a gate region. An extension region laterally continues the substrate (body) region beyond the source and drain regions and borders, in contact with, the source region through a border region having the first conductivity type. This supports formation of an electrical connection of the source region and the substrate (body) region.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS FRANCEMONTROUGE FRANCE MONTROUGE HAUTS-DE-SEINE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bertrand, Guillaume Saint Martin d'heres, FR 8 29
Cathelin, Philippe Laval, FR 12 21
Monroy, Aguirre Augustin St. Martin d'heres, FR 1 0
Paulin, Raphael Le Versoud, FR 5 3

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