Buried etch stop layer for damascene bit line formation

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United States of America Patent

PATENT NO 9847249
SERIAL NO

14533846

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Abstract

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A stack of layers is formed that includes first, second, and third dielectric layers. Contact plugs are then formed extending through the stack. Then a fourth dielectric layer is formed over the stack and contact plugs and trenches are formed through the fourth and third dielectric layers, extending to the second dielectric layer and exposing contact plugs.

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Patent Owner(s)

Patent OwnerAddress
SANDISK TECHNOLOGIES INC951 SANDISK DRIVE LEGAL DEP MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukuo, Noritaka Yokkaichi, JP 16 204
Futase, Takuya Nagoya, JP 43 886
Kakegawa, Tomoyasu Yokkaichi, JP 17 203
Takahashi, Yuji Yokkaichi, JP 370 5926
Yamada, Katsuo Yokkaichi, JP 24 257

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