Method and apparatus for using universal cavity wafer in wafer level packaging
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 19, 2017
Issued Date -
N/A
app pub date -
Jun 9, 2016
filing date -
Jun 9, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An electronics module assembly is described herein that packages dies using a universal cavity wafer that is independent of electronics module design. In one embodiment, the electronics module assembly can include a cavity wafer having a single frontside cavity that extends over a majority of a frontside surface area of the cavity wafer and a plurality of fillports. The assembly can also include at least one group of dies placed in the frontside cavity and encapsulant that secures the position of the at least one group of dies relative to the cavity wafer. Further, a layer of the encapsulant can cover a backside of the cavity wafer.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2016 Application Filing Year
- H01L Class
- 27971 Applications Filed
- 23507 Patents Issued To-Date
- 84.05 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 1 Citation Count
- H01L Class
- 18.50 % this patent is cited more than
- 8 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jun 19, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jun 19, 2029 |
