Adaptive charge balanced edge termination
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Dec 12, 2017
Issued Date -
N/A
app pub date -
May 30, 2012
filing date -
May 30, 2012
priority date (Note) -
In Force
status (Latency Note)
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Abstract
In one embodiment, a semiconductor device can include a substrate including a first type dopant. The semiconductor device can also include an epitaxial layer located above the substrate and including a lower concentration of the first type dopant than the substrate. In addition, the semiconductor device can include a junction extension region located within the epitaxial layer and including a second type dopant. Furthermore, the semiconductor device can include a set of field rings in physical contact with the junction extension region and including a higher concentration of the second type dopant than the junction extension region. Moreover, the semiconductor device can include an edge termination structure in physical contact with the set of field rings.
First Claim
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Family
Country | kind | publication No. | Filing Date | Type | Sub-Type |
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- VISHAY-SILICONIX
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
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Pattanayak, Deva N | Saratoga, US | 27 | 623 |
# of filed Patents : 27 Total Citations : 623 | |||
Tipirneni, Naveen | Santa Clara, US | 39 | 250 |
# of filed Patents : 39 Total Citations : 250 |
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Patent Citation Ranking
- 5 Citation Count
- H01L Class
- 18.50 % this patent is cited more than
- 8 Age
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