HEAT-DISSIPATING SEMICONDUCTOR PACKAGE FOR LESSENING PACKAGE WARPAGE

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United States of America Patent

SERIAL NO

15355011

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Importance

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Abstract

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A heat-dissipating semiconductor package includes a substrate, a chip, a first encapsulation body, a second encapsulation body and a heat sink. The substrate has an inner surface. The chip is disposed on the inner surface of the substrate. The first encapsulation body is formed on the inner surface of the substrate and encapsulates the chip. The second encapsulation body is formed on the first encapsulation body and a periphery area of the inner surface to encapsulate sidewalls and a top surface of the first encapsulation body and cover the periphery area of the inner surface. Wherein, the Young's modulus of the second encapsulation body is less than the Young's modulus of the first encapsulation body. The heat sink is attached to the second encapsulation body. Thereby, the design of the heat-dissipating semiconductor package utilizes multiple encapsulation bodies to reduce the package warpage after installing the heat sink.

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Patent Owner(s)

Patent OwnerAddress
POWERTECH TECHNOLOGY INCNO 10 DATONG RD HSINCHU INDUSTRIAL PARK HUKOU TOWNSHIP HSINCHU COUNTY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chou, Chia-Jen HSINCHU COUNTY, TW 6 21

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