Adaptively controlled duty cycle clock generation circuit
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United States of America Patent
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Dec 5, 2017
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Dec 5, 2016
filing date -
Dec 5, 2016
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Abstract
A clock generation circuit coupled to an integrator circuit uses a variable resistance that is adjusted in a transconductance bias feedback circuit. This resistance is calibrated to the reciprocal of the transconductance of the input amplifier. The product of the adjusted resistance and a capacitance in the clock generation circuit provides a time constant for the settling time of the integrator and controls a pulse width of an adaptively controlled duty cycle output clock.
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