Manufacturing method of trench power MOSFET
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United States of America Patent
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Dec 5, 2017
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app pub date -
Oct 26, 2016
filing date -
Dec 31, 2014
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Abstract
A manufacturing method of a trench power MOSFET is provided. In the manufacturing method, the trench gate structure of the trench power MOSFET is formed in the epitaxial layer and includes an upper doped region, a lower doped region and a middle region interposed therebetween. The upper doped region has a conductive type reverse to that of the lower doped region, and the middle region is an intrinsic or lightly-doped region to form a PIN, P+/N− or N+/P− junction. As such, when the trench power MOSFET is in operation, a junction capacitance formed at the PIN, P+/N− or N+/P− junction is in series with the parasitic capacitance. Accordingly, the gate-to-drain effective capacitance may be reduced.
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