Multi-processor with selectively interconnected memory units

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9817790
SERIAL NO

15052730

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A multi-processor having a plurality of data processing units and memory units has a bus system that selectively interconnects the processing units and the memory units.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
SCIENTIA SOL MENTIS AGNEUHOFSTRASSE 1 SCHINDELLEGI 8834

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Vorbach, Martin Lingenfeld, DE 174 5665

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 May 14, 2025
11.5 Year Payment $7400.00 $3700.00 $1850.00 May 14, 2029
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00