Memory controller

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United States of America Patent

PATENT NO 9817711
SERIAL NO

14478372

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Abstract

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An ECC circuit can operate in a plurality of error correction modes with different correcting capabilities for data stored in a memory. The ECC circuit calculates a syndrome with respect to information data in accordance with an error correction mode set by a control part and adds a syndrome of a fixed length in which dummy bits are added to the calculated syndrome, to the information data. When code data is read out, the ECC circuit performs a correction process on the code data by using the syndrome included in the code data.

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Patent Owner(s)

Patent OwnerAddress
MEGACHIPS CORPORATION1-1 MIYAHARA 1-CHOME YODOGAWA-KU OSAKA-SHI OSAKA 532-0003

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukushita, Eri Osaka, JP 2 34
Sugahara, Takahiko Osaka, JP 28 132

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