Stress control on thin silicon substrates

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United States of America Patent

PATENT NO 9806183
SERIAL NO

14953792

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Abstract

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Methods for stress control in thin silicon (Si) wafer-based semiconductor materials. By a specific interrelation of process parameters (e.g., temperature, reactant supply, time), a highly uniform nucleation layer is formed on the Si substrate that mitigates and/or better controls the stress (tensile and compressive) in subsequent layers formed on the thin Si substrate.

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Patent Owner(s)

Patent OwnerAddress
VEECO INSTRUMENTS INC1 TERMINAL DRIVE PLAINVIEW NY 11803

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Papasouliotis, George Warren, US 12 175
Su, Jie Metuchen, US 136 2659

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