Frequency and time domain streaming receiver
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 24, 2017
Issued Date -
N/A
app pub date -
Dec 11, 2015
filing date -
Mar 31, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A wideband signal processing receiver system including an interface for connecting to an analog to digital converter (ADC) of a broader signal chain lineup, wherein the interface receives digital data from the ADC, and a field programmable gate array (FPGA) and associated configuration for converting the digital data into two digital signal paths. The two digital signal paths include a frequency domain path and an optionally decimated time domain path. A memory and/or high speed bus stores or transfers high speed bus/link data from the frequency domain path and the time domain path.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully