Method and apparatus for correcting for power harmonics
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United States of America Patent
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Oct 24, 2017
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app pub date -
Jan 12, 2017
filing date -
Jan 12, 2017
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Abstract
A harmonics correction circuit is implemented as an independent device (such as a SiP or ASIC), and includes (1) a first node, (2) a second node, (3) a first current path extending from the first node to the second node, (4) a second current extending from the first node to ground, (5) a third current path extending from the first node to the second node, (6) a sense resistor electrically connected to the second node and to ground, (7) a differential circuit (e.g., a differential amplifier or other type of operational amplifier (“op-amp”)) that has a first input, a second input, and an output, (8) a transistor comprising a gate that is electrically connected to the output of the differential circuit, a drain that is electrically connected to the third current path, and a source that is electrically connected along the third current path.
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