Resistive random access memory device embedding tunnel insulating layer and memory array using the same and fabrication method thereof

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United States of America Patent

PATENT NO 9799706
SERIAL NO

15182640

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Abstract

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A resistive random access memory device is provided with a tunneling insulator layer between a resistance change layer and a bottom electrode. Thus, it is possible: to raise the selection (on/off) ratio by the current of a direct tunneling induced by low voltage in the unselected cell and the current of an F-N tunneling induced by high voltage in the selected cell, to efficiently suppress the leakage current in the read operation, to make a low current operation less μA level by controlling the thickness of the tunneling insulator layer, and to be simultaneously fabricated together with circuit devices by forming the bottom electrodes (word lines) with a semiconductor material.

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Patent Owner(s)

Patent OwnerAddress
SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION1 GWANAK-RO GWANAK-GU SEOUL 08826

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Seongjae Seoul, KR 21 122
Kim, Sungjun Seoul, KR 122 624
Park, Byung-Gook Seoul, KR 67 1081

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