Method of aligning quadrate wafer in first photolithography process

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United States of America Patent

PATENT NO 9791790
APP PUB NO 20160170317A1
SERIAL NO

14901541

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Abstract

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The present invention provides a method of aligning a quadrate wafer in a first photolithography process. The method includes: step A: fabricating mask aligning markers in a periphery region of a mask, which is used for a first exposure process of the quadrate wafer, around a mask pattern of the mask; step B: during the first exposure process, positioning the quadrate wafer in a preset region by using the mask aligning markers on the mask, and exposing the quadrate wafer through the mask; and step C: performing alignment for the quadrate wafer during a second exposure process and subsequent exposure processes by using aligning markers on the quadrate wafer that are obtained during the first exposure process. The method may be easily and reliably performed to ensure intact dies at periphery of a quadrate wafer to be produced and thus render increased yield of chips.

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Patent Owner(s)

  • INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Guo, Jinxia Beijing, CN 5 12
Kong, Qingfeng Beijing, CN 2 6
Li, Jinmin Beijing, CN 19 82
Wang, Junxi Beijing, CN 31 58
Yi, Xiaoyan Beijing, CN 5 19

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