Method and apparatus for low latency communication in an automatic testing system

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United States of America Patent

PATENT NO 9791511
SERIAL NO

13836567

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Abstract

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According to some aspects, a system and method for processing messages in a plurality of successive cycles is provided. One such system may include a plurality of first circuits, each first circuit configured to output a message, the plurality of first circuits configured to operate synchronously, a first plurality of buffers, each buffer associated with a respective first circuit and configured to store a message output by the respective first circuit, a communication path configured to receive the plurality of messages from the buffers and to perform aggregation of the messages, thereby generating an aggregated indication, and one or more second circuits. The one or more second circuits are configured to operate synchronously and to receive the aggregated indication, wherein buffers of the first plurality of buffers are configured to store messages from respective first circuits for different times.

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Patent Owner(s)

Patent OwnerAddress
TERADYNE INC600 RIVERPARK DRIVE NORTH READING MA 01864

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Conner, George W Camarillo, US 32 662
Nguyen, Thien D Thousand Oaks, US 2 17

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