Methods and apparatus for always on domain finite state machine shutdown using a clock source from a power managed domain
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United States of America Patent
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Oct 3, 2017
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app pub date -
Jul 26, 2016
filing date -
Jul 26, 2016
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Abstract
An apparatus includes: a voltage regulator that outputs a voltage responsive to an enable signal; a power managed domain coupled to the voltage regulator and including a clock generator configured to output a clock signal from the clock generator; and an always on domain. The always on domain receives the clock signal. The always on domain includes a finite state machine coupled to receive the clock signal and receiving a shutdown request signal. The finite state machine is configured to output a signal to control power to the power managed domain and to disable the clock generator, responsive to the shutdown request signal. The finite state machine receives an asynchronous wake signal, and circuitry in the always on domain is coupled to enable power to the power managed domain and to the clock generator, responsive to the asynchronous wake input signal.
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