BRIDGED IMBALANCE PUF UNIT CIRCUIT AND MULTI PUF CIRCUITS
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United States of America Patent
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Sep 26, 2017
Grant Date -
Sep 28, 2017
app pub date -
Feb 24, 2017
filing date -
Mar 25, 2016
priority date (Note) -
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Abstract
The present invention discloses a bridge imbalance PUF unit circuit and multi PUF circuits; the bridge imbalance PUF unit circuit comprises a four-arm bridge unit circuit and a contrast output unit circuit; the multi PUF circuits comprise a timing controller, a row decoder, a column decoder, a memory array, a row output circuit and a column output circuit; each memory unit in the memory array comprises a bridge imbalance PUF unit circuit and 4 NMOS tubes; the present invention features in higher randomness that is up to 51.8% at the supply voltage of 1.2V under the temperature of 25° C.
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