Method and machine for examining wafers
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United States of America Patent
Stats
-
Sep 19, 2017
Issued Date -
N/A
app pub date -
Aug 20, 2012
filing date -
Feb 13, 2009
priority date (Note) -
In Force
status (Latency Note)
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Abstract
Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same “lot”. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.
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International Classification(s)
- 2012 Application Filing Year
- H01L Class
- 20465 Applications Filed
- 18077 Patents Issued To-Date
- 88.34 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H01L Class
- 0 % this patent is cited more than
- 8 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Mar 19, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Mar 19, 2029 |
