Apparatus and method for clock generation
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Aug 29, 2017
Issued Date -
N/A
app pub date -
Dec 12, 2014
filing date -
Dec 12, 2014
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A clock and data recovery (CDR) system may use one or more clock signals in sync with recovered data rate. By accumulating a dithering tuning counter value at a data oversampling rate, a plurality of single bit signals at multiples of the recovered data rate and in sync with the recovered data rate can be accurately generated while utilizing the full range of the accumulator. This plurality of clock signals can be used in various modules in the CDR system and other modules in a transceiver system incorporating the CDR system.
First Claim
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International Classification(s)
- 2014 Application Filing Year
- H03L Class
- 712 Applications Filed
- 648 Patents Issued To-Date
- 91.02 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 1 Citation Count
- H03L Class
- 13.04 % this patent is cited more than
- 8 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
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| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Feb 28, 2025 |
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