Hybrid interconnects and method of forming the same

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United States of America Patent

PATENT NO 9748173
SERIAL NO

15202656

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Abstract

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A method for manufacturing a semiconductor device includes forming a trench in at least one dielectric layer; and forming an interconnect structure in the trench, wherein forming the interconnect structure includes forming a first conductive layer on a bottom surface of the trench, and partially filling the trench, and forming a second conductive layer on the first conductive layer, and filling a remaining portion of the trench, wherein the second conductive layer comprises a different material from the first conductive layer, and wherein an amount of the first conductive layer in the trench is controlled so that an aspect ratio of the second conductive layer has a value that is determined to result in columnar grain boundaries in the second conductive layer.

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Patent Owner(s)

Patent OwnerAddress
ELPIS TECHNOLOGIES INC1891 ROBERTSON ROAD SUITE 100 OTTAWA K2H 5B7

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Murray, Conal E Yorktown Heights, US 79 938
Yang, Chih-Chao Glenmont, US 1081 8220

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