Level shifter circuit with improved time response and control method thereof
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United States of America Patent
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Aug 22, 2017
Grant Date -
Jul 14, 2016
app pub date -
Aug 10, 2015
filing date -
Jan 13, 2015
priority date (Note) -
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Abstract
A level shifter circuit with improved time response and a control method thereof are disclosed herein. The level shifter circuit includes the output stage circuit of a level shifter and a booster circuit. The output stage circuit of the level shifter includes a first pass switch configured to transfer a voltage level of the first power supply of the level shifter to an output node, and a second pass switch connected between a second power supply and the first pass switch. The booster circuit accelerates the switching operation of the level shifter by accelerating a time response during the turning on or off operation of the first pass switch using charge sharing between a first capacitor and the parasitic capacitance of the control node of the first pass switch, which occurs via a first switch.
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