Semiconductor package

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United States of America Patent

PATENT NO 9735132
SERIAL NO

15358152

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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A semiconductor package includes a first chip, an insulating protection layer, a second chip, a plurality of second conductive bumps and an underfill. The insulating protection layer is disposed on a first active surface of the first chip and includes a concave. Projections of a plurality of first inner pads and a plurality of first outer pads of the first chip projected on the insulating protection layer are located in the concave and out of the concave, respectively. The second chip is flipped on the concave and includes a plurality of second pads. Each of the first inner pads is electrically connected to the corresponding second pad through the corresponding second conductive bump. The underfill is disposed between the concave and the second chip and covers the second conductive bumps.

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Patent Owner(s)

Patent OwnerAddress
CHIPMOS TECHNOLOGIES INCHSINCHU

International Classification(s)

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  • 2016 Application Filing Year
  • H01L Class
  • 27971 Applications Filed
  • 23507 Patents Issued To-Date
  • 84.05 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances20162017201820192020202120222023202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Weng, Cheng-Yi Hsinchu, TW 10 568
Yang, Cheng-Yu Hsinchu, TW 46 143

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  • 0 Citation Count
  • H01L Class
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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges26979357140748325312788503629173801 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +050010001500200025003000350040004500500055006000650070007500800085009000950010000

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