Cap chip and reroute layer for stacked microelectronic module
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United States of America Patent
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Aug 8, 2017
Grant Date -
Jan 24, 2013
app pub date -
Jul 16, 2012
filing date -
Jul 19, 2011
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Abstract
A cap chip or high density reroute layer for use in a stacked microelectronic module. A first set of electrically conductive reroute layers are defined on a sacrificial substrate. One or more stud bump columns are defined on an exposed conducive pad on a conductive reroute layer. One or more active or passive electronic elements, or both may be electrically coupled to one or more exposed conductive pads. The layer is encapsulated in an encapsulant and the stud bump columns exposed by removing a portion of the encapsulant. A second set of electrically conductive reroute layers is defined on the layer and electrically coupled to the stud bumps. The sacrificial substrate is removed to provide a cap chip or reroute layer.
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