Rate adaptation across asynchronous frequency and phase clock domains
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United States of America Patent
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Aug 1, 2017
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N/A
app pub date -
Apr 10, 2015
filing date -
Feb 7, 2007
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Abstract
A rate adaptation system includes a barrel shift slot register and a rate adaptation register. The barrel shift slot register includes a plurality of slots with one of a valid read request or a dummy read request. A rate adaptation register is configured to sequentially cycle through the slots of the barrel shift register in response to a clock providing valid read requests to a FIFO buffer and to skip provision of valid read requests for clock cycles of the first clock associated with slots that include dummy read requests. The rate adaption register may also receive data blocks from the FIFO buffer and provide those data blocks to another FIFO buffer.
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