Memory devices and methods for storing single data value in multiple programmable resistance elements
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United States of America Patent
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Aug 1, 2017
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Jul 4, 2015
filing date -
Mar 1, 2011
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Abstract
A memory device can include a plurality of bit lines; plurality of memory elements coupled to the bit lines, each memory element including a memory layer formed between two electrodes, the memory layer being programmable between a plurality of different resistance states by creation and removal of conductive regions therein by application of electric fields; and at least one sense amplifier (SA) configured to compare a first value, corresponding to a resistance state of a first memory element, to a second value, corresponding to a resistance state of a second memory element.
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