Self-healing, fault-tolerant FPGA computation and architecture
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United States of America Patent
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Aug 1, 2017
Grant Date -
Mar 19, 2015
app pub date -
Jun 5, 2012
filing date -
Apr 19, 2012
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Abstract
The present invention relates to a computation cell and a self-healing, fault-tolerant FPGA architecture and, more particularly, to a computation cell and an FPGA including the same, which can detect a transient internal error or permanent internal error by inputting an original function and a spare function and comparing a prestored error detection code with a generated error detection code signal. The computation cell and the self-healing, fault-tolerant FPGA architecture of the present invention can reconfigure stem cells and look-up tables included in the computation cell and can output a normal output signal even if a transient error or a permanent error is generated in an computation cell such that the corresponding computation cell and an computation tile can be normally operated.
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