Adaptive fault clearing based on power transistor temperature

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United States of America Patent

PATENT NO 9705310
APP PUB NO 20150146327A1
SERIAL NO

14518311

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Abstract

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A system includes a current measurement unit, an overload timer, and a processing unit. The current measuring unit measures current through a power transistor, and the overload timer measures an overload time associated with the measured current. The processing unit receives a user-specified overload time setting or a user-specified overload amperage setting associated with a protection device connected in series with a load, receives a temperature measurement of a component associated with the power transistor or a measurement of overload time associated with the current, wherein the power transistor supplies the current to the load and the protection device, and selectively turns off the power transistor based on the measured temperature, the measured current through the power transistor, and the user-specified overload amperage setting or based on the measured temperature, the measured overload time, and the user-specified overload time.

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Patent Owner(s)

Patent OwnerAddress
THOMAS & BETTS INTERNATIONAL LLC501 SILVERSIDE ROAD SUITE 67 WILMINGTON DE 19809

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pfitzer, Hans-Erik Chesterfield, US 11 217
Walraven, Justin San Diego, US 5 8

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