Peripheral clock management
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United States of America Patent
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Jul 11, 2017
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N/A
app pub date -
Sep 15, 2015
filing date -
Oct 20, 2014
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Abstract
A clock generator for use in an electronic system comprising an integrated circuit such as a microcontroller. A plurality of oscillators are selectively enabled to produce a respective plurality of oscillator signals. For each of a plurality of clock outputs, a mux selects a respective one of the oscillator signals in response to a respective select signal provided by a clocked facility. The selected oscillator signal is gated out as the respective clock signal in response to a respective gate signal also provided by the clocked facility.
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