Test method and system for cut-in voltage
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United States of America Patent
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Jul 4, 2017
Grant Date -
Nov 26, 2015
app pub date -
Dec 31, 2013
filing date -
Jan 23, 2013
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In Force
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Abstract
A test method and system for cut-in voltage. The method comprises: coarse scanning of the cut-in voltage: a grid voltage, i.e., the cut-in voltage, is quickly determined when a drain terminal current is greater than a target current for the first time (100); accurate scanning of the cut-in voltage: a scanning step length is shortened continuously until the scanning step length is shorter than a preset step length, and each time the scanning step length is shortened, the scanning is conducted according to the current shortened scanning step length on the basis of the cut-in voltage determined in the former time, and then the cut-in voltage under the condition of the current shortened scanning step length is determined again (200). The scanning voltage is automatically increased or decreased by the test method and system through adding high resolution and high precision test conversion into a second scanning test, and therefore the testing of the cut-in voltage becomes more efficient and more accurate.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
CSMC TECHNOLOGIES FAB2 CO LTD | 214028 NO 8 XINZHOU ROAD NATIONAL HI TECH INDUSTRIAL DEVELOPMENT ZONE WUXI JIANGSU WUXI CITY JIANGSU PROVINCE 214028 |
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Chen, Hanshun | Wuxi New District, CN | 1 | 0 |
Lian, Xiaoqian | Wuxi New District, CN | 1 | 0 |
Lin, Yaojun | Wuxi New District, CN | 1 | 0 |
Wang, Ming | Wuxi New District, CN | 361 | 3827 |
Xu, Wenhui | Wuxi New District, CN | 50 | 1054 |
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