Saving power when in or transitioning to a static mode of a processor by using feedback-configured voltage regulator

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United States of America Patent

PATENT NO 9690366
SERIAL NO

15241690

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Abstract

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A method for reducing power utilized by a processor including the steps of determining that a processor is transitioning from a computing mode to a mode is which system clock to the processor is disabled, and reducing core voltage to the processor to a value sufficient to maintain state during the mode in which system clock is disabled.

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Patent Owner(s)

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HD SILICON SOLUTIONS LLC5900 BALCONES DR STE 100 AUSTIN TX 78731

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Halepete, Sameer San Jose, US 8 243
Klayman, Keith Sunnyvale, US 13 270
Read, Andrew Sunnyvale, US 24 322

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