Logic circuits with and-not gate for fast fuzzy decoders
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United States of America Patent
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Jun 20, 2017
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Feb 5, 2014
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Dec 14, 2010
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Abstract
A logic decoder circuit capable of performing Boolean or fuzzy logic has one or more logic components configured to perform a logic function of an AND-NOT gate, each AND-NOT gate comprising a circuit that performs a conjunction of an excitatory input X and an inhibitory input Y to obtain an output X-AND-NOT-Y substantially linearly for given ranges for X and Y. Certain preferred designs are provided for an X-AND-NOT-Y logic gate and a family of fast fuzzy decoders composed of such gates.
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