Multi-core processor for optimized power consumption in a security and home automation system
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United States of America Patent
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Jun 20, 2017
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Jan 9, 2015
filing date -
Jan 9, 2015
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Abstract
Techniques for using a multi-core processor for optimizing power consumption in a security and home automation system are described. The security and home automation system may include a multi-core processor having a first core and a second core. The first core may be partitioned from the second core to form an asymmetric multi-core processor. The first core is a master core assigned to execute a real time operating system (RTOS) and configured to periodically transition between a partial sleep state and an awake state during a power shortage condition. The second core is a slave core assigned to execute a standard operating system (OS) and configured to enter a deep sleep state during the power shortage condition.
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