Apparatus for testing a package-on-package semiconductor device
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United States of America Patent
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Jun 13, 2017
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app pub date -
Mar 11, 2015
filing date -
Mar 12, 2014
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Abstract
An apparatus for testing a package-on-package semiconductor device includes a top cover, a lower base, a heat dissipation module, and a plurality of probes. The lower base is disposed under the top cover so as to form an internal accommodation space for receiving an upper chip. The heat dissipation module includes a heat sink arranged in the internal accommodation space and attached to an upper surface of the upper chip. The probes are arranged in the lower base so as to electrically connect the upper chip with a lower chip. By the heat sink arranged in the internal accommodation space formed of the top cover and the lower base, heat generated from the upper chip during operation of the upper chip can be greatly dissipated so that the performance and the service life of the upper chip can be improved.
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